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Why Do You Need Chip-Package-System Co-Design And Co-Analysis?
Whether it is the need for sustainable energy, or driving performance while keeping power at bay, or enabling safe and reliable operation of any electronic system, containment of electronic noise —...
View ArticleLower Power Plus Better Performance
The tradeoff between power and performance is becoming less about one versus the other, and more about a dual benefit, as new computing and chip architectures begin rolling out. Neural networking,...
View Article2.5D Surprises And Alternatives
Semiconductor Engineering sat to discuss advanced packaging issues with Juan Rey, senior director of engineering for Calibre at Mentor Graphics; Max Min, senior technical manager at Samsung; and Lisa...
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Tech Talk: Embedded Memories
Dave Eggleston, vice president of embedded memory at GlobalFoundries, talks about the pros and cons of new types of embedded memory, including which work best for certain applications and with various...
View ArticleThe Battle To Embed The FPGA
There have been many attempts to embed an FPGA into chips in the past, but the market has failed to materialize—or the solutions have failed to inspire. An early example was Triscend Corporation,...
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Silicon Photonics Comes Into Focus
Silicon photonics is attracting growing attention and investment as a companion technology to copper wiring inside of data centers, raising new questions about what comes next and when. Light has...
View ArticleMoore’s Law Debate Continues
Does shrinking devices still make sense from a cost and performance perspective? The answer isn’t so simple anymore. Still, the discussion as to whether semiconductors are still on track with Moore’s...
View ArticlePartitioning For Power
Examine any smartphone design today and most of the electronic circuitry is “off” most of the time. And regardless of how many processor cores are available, it’s rare to use more than a couple of...
View ArticleMaking 2.5D, Fan-Outs Cheaper
Now that it has been shown to work, the race is on to make advanced packaging more affordable. While device scaling could continue for another decade or more, the number of companies that can afford to...
View ArticleAdvanced Packaging Requires Better Yield
Whether Moore’s Laws truly ends, or whether the semiconductor industry reaches into the Angstrom world after 3nm—the semiconductor industry dislikes fractions—advanced packaging increasingly will...
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7nm Design Success Starts With Multi-Domain Multi-Physics Analysis
Companies can benefit from advancements in the latest semiconductor process technology by delivering smaller, faster and lower power products, especially for those servicing mobile, high performance...
View ArticleOptimizing Multiple IoT Layers
As the number of connected devices rises, so do questions about how to optimize them for target markets, how to ensure they play nicely together, and how to bring them to market quickly and...
View ArticleBEOL Issues At 10nm And 7nm
Semiconductor Engineering sat down to discuss problems with the back end of line at leading-edge nodes with Craig Child, senior manager and deputy director for GlobalFoundries’ advanced technology...
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Uncertainty Grows For 5nm, 3nm
As several chipmakers ramp up their 10nm finFET processes, with 7nm just around the corner, R&D has begun for 5nm and beyond. In fact, some are already moving full speed ahead in the arena. TSMC...
View ArticleWhat’s Missing In Advanced Packaging
Even though Moore’s Law is running out of steam, there is still a need to increase functional density. Increasingly, this is being done with heterogeneous integration at the package or module level....
View ArticleOvercoming The Limits Of Scaling
Semiconductor Engineering sat down to discuss the increasing reliance on architectural choices for improvements in power, performance and area, with Sundari Mitra, CEO of NetSpeed Systems; Charlie...
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Transferring Skills Getting Harder
Rising complexity in developing chips at advanced nodes, and an almost perpetual barrage of new engineering challenges at each new node, are making it more difficult for everyone involved to maintain...
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What’s Next For Transistors
The IC industry is moving in several different directions at once. The largest chipmakers continue to march down process nodes with chip scaling, while others are moving towards various advanced...
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Changing Direction In Chip Design
Andrzej Strojwas, chief technologist at PDF Solutions and professor of electrical and computer engineering at Carnegie Mellon University—and the winner of this year’s Phil Kaufman Award for...
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Betting On Wafer-Level Fan-Outs
Advanced packaging is starting to gain traction as a commercially viable business model rather than just one more possible option, propelled by the technical difficulties in routing signals at 10nm and...
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