The Evolution of HBM
High-bandwidth memory originally was conceived as a way to increase capacity in memory attached to a 2.5D package. It has since become a staple for all high-performance computing, in some cases...
View ArticleEfficient ESD Verification For 2.5/3D Automotive ICs
Protection against electrostatic discharge (ESD) events is an extremely important aspect of integrated circuit (IC) design and verification, particularly for 2.5/3D designs targeted for automotive...
View ArticleTesting For Thermal Issues Becomes More Difficult
Increasingly complex and heterogeneous architectures, coupled with the adoption of high-performance materials, are making it much more difficult to identify and test for thermal issues in advanced...
View ArticleESD Verification For 2.5D And 3D-ICs
Ensuring your integrated circuit (IC) design can withstand electrostatic discharge (ESD) events without incurring damage or failure is an extremely important activity in IC circuit design and...
View ArticleDFT At The Leading Edge
Experts at the Table: Semiconductor Engineering sat down to discuss the rapidly changing landscape of design for testability (DFT), focusing on the impact of advancements in fault models, high-speed...
View ArticleAssembly Design Rules Slowly Emerge
Process design kits (PDKs) play an essential in ensuring that silicon technology can proceed from one generation to the next in a manner that design tools can keep up with. No such infrastructure has...
View ArticleBold Prediction: 50% Of New HPC Chip Designs Will Be Multi-Die In 2025
Monolithic chips have been the workhorses behind decades of technological advancement. But just as the industrial revolution saw workhorses replaced with more efficient and powerful machinery, the...
View ArticleNeed For KGD Drives Singulated Die Screening
The move to multi-die packaging is driving chipmakers to develop more cost-effective ways to ensure only known-good die are integrated into packages, because the price of failure is significantly...
View ArticleNearly Invisible: Defect Detection Below 5nm
Detecting sub-5nm defects creates huge challenges for chipmakers, challenges that have a direct impact on yield, reliability, and profitability. In addition to being smaller and harder to detect,...
View ArticleChiplet Tradeoffs And Limitations
The semiconductor industry is buzzing with the benefits of chiplets, including faster time to market, better performance, and lower power, but finding the correct balance between customization and...
View Article